Agilent Technologies U7242A Manuel d'utilisateur

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Page 1 - Technology Overview

SuperSpeed USB 3.0 Technology Overview and Industry UpdateJim ChoateUSB Product ManagerAgilent TechnologiesPage 1

Page 2

USB-IF Still Provides USB 3.0 Certification at Intel PIL – Focus is on Hosts and Hubs•PIL still performing testing between USBIF workshops•Test lab ex

Page 3 - Membership

U7243A USB 3.0 TX Compliance ApplicationPage 11

Page 4 - SuperSpeed USB Timeline

Transmitter test requirements(TX Far End)Page 12

Page 5

USB 3.0 Signal Path FlowEQ+-ConnectorChannelConnectorEQ+-TP1TxpTxn RxnRxpTx RxSignal generated hereExits IC hereExits board hereCombine measurements a

Page 6

S-ParametersPlot showing S21 Insertion LossPage 14

Page 7 - •USB 3.0 SuperSpeed

Tx testing emulated through s-parametersEmbed Channel File“DEVICE_3MCABLE.s4p”Validation with InfiniiSim of DSA91304APage 15

Page 8 - Key Updates

Compliance Channels•Compliance Channels are used to test TX and RX for worst case channel conditions•Back panel USB route solution•Channel loss will d

Page 9

Transmitter TestsTX tests:•LFPS (Near end)•SSC (Near end)•TX (Far End: TP1)•Eye Pattern•Tj, Dj (CP0 Pattern•Rj (CP1 Pattern)•Amplitude“Embedded channe

Page 10

LFPS Test RequirementsPage 18

Page 11

PING LFPSToggles CMMCP0DjCP1RjTX Testing Requirements: Polling.LFPS to compliance modePage 19

Page 12 - Transmitter test requirements

 Introduction USB 3.0 Industry Overview Physical Layer Overview Physical Layer Testing Cable and Connector Testing Compliance Test Challenges T

Page 13 - USB 3.0 Signal Path Flow

Toggling USB 3.0 TX test modes•Connect Aux Out to DUT SSRX+ to toggle test modesPage 20

Page 14 - S-Parameters

Transmitter testing uses embedded compliance channelSSC failures are a challengePage 21

Page 15 - DSA91304A

Cable Test FixturesOfficial Fixtures for testing cable assemblies and connectors are required.Below is a set of fixtures for USB 3.0 cable assemblies

Page 16 - Compliance Channels

USB 3.0 Cable-Connector Compliance Test MOIusing Agilent 86100C/D DCA Mainframe and 54754A TDR/TDT Module• Step-by-Step Method of Implementation (MOI)

Page 17 - Transmitter Tests

ENA option TDR is used by all USB-IF certified test centers to perform USB 3.0 connectors and cable assemblies compliance testsUSB 3.0 Cable/Connector

Page 18 - LFPS Test Requirements

SSC is one of biggest challenges for USB 3.0• Spread spectrum clocking is the intentional down-spreading of the transmitter’s output data rate.-300ppm

Page 19

SuperSpeed Receiver TestsRx Compliance and Jitter Tolerance TestingPage 26

Page 20 - DUT SSRX+ to toggle

Turn on loopback by sending LFPS and required training sequencesThe receiver stress pattern is BDAT with SKPs inserted as described in the standard.Th

Page 21 - Transmitter testing uses

SuperSpeed Host Receiver Test Calibration and compliance channelHost Channel setupPage 28

Page 22 - Cable Test Fixtures

Device Channel setupSuperSpeed Device Receiver Test Calibration and compliance channelPage 29

Page 23 - ENA-TDR based methods

USB Implementors Forum, inc (USB-IF)USBIF Board MembersIntel, NEC, HP, Microsoft, ST-Ericsson, LSIAgilent Active MembershipMarketing WGDeviceWGCabConW

Page 24 - Centers Worldwide

Fixtures and cables available from the USBIF at:http://www.usb.org/developers/estoreinfo/Page 30

Page 25 - -3700ppm

SuperSpeed Receiver Test Calibration and compliance channelsPage 31

Page 26 - SuperSpeed Receiver Tests

Typical SuperSpeed Link Turn-on SequencePage 32

Page 27 - Receiver Test Procedure

Standard Loopback Entry Sequence If a DUT under test does not enter loopback with this sequence it is technically a failure.Page 33

Page 28 - Host Channel setup

Host and Hub Drop/Droop testing• Un-configured power is now 150mA• High power devices can draw up to 900mA• A new Drop-Droop fixture is available from

Page 29 - Device Channel setup

Host Droop Test ResultPage 35

Page 30

USB 3.0 Protocol Decode: on scopePage 36

Page 31

Additional USB 3.0 Protocol Capabilities•Search and trigger•Views: Details, Payload, HeaderPage 37

Page 32

TX Compliance Pitfalls•SSC modulation•SSC deviation•High Rj (flicker Jitter)•Poor de-emphasis•Cause eye failure at end of channelPage 38

Page 33

RX Compliance Pitfalls•Loopback issues• Dut needs custom sequence• DUT drops out easily•Calibration issues• Inconsistent• Poor Sj/Rj mod•SSC deviation

Page 34

Product DevelopmentInitial DeploymentBroad DeploymentSuperSpeed USB Timeline2010Compliance Program/Industry Enabling DevelopmentUSB 3.0 Electrical Com

Page 35 - Host Droop Test Result

Don’t forget USB 2.0 Compliance PitfallsFailure to properly support USB suspend• Low power state required of all devices– < 2.5mA (spec says 500uA

Page 36

Compliance Pitfalls – RX Test•Misinterpretation of RX sensitivity and Squelch requirements has caused considerable confusion and discrepancy in test r

Page 37 - •Search and trigger

Transmitter Characterization(PHY/TSG/OOB)DSAX93204A oscilloscopeU7243A USB 3.0 and N5416A USB 2.0N8805A USB 3.0 Protocol viewer softwareReceiver Jit

Page 38 - TX Compliance Pitfalls

Intel and AMD announce USB 3.0 ChipsetsIntel Will Add Both USB 3.0 and Thunderbolt To Ivy BridgeApril 15, 2011http://www.newsfactor.com/news/Intel-Ado

Page 39 - RX Compliance Pitfalls

What is Thunderbolt?• Source: Wikipediahttp://en.wikipedia.org/wiki/Thunderbolt_(interface)• Connector is Mini DP• Host side interface x4 PCIeand DP•

Page 40

De-embedding and Precision Probe At 5Gbps and above removing probing effects is key Typical de-embedding requires accurate s-parameters Challenge o

Page 41 - Compliance Pitfalls – RX Test

Save time: Two options for characterization before PrecisionProbeOption 1: Six steps (you would need to do the following)Option 2: Ignore the cable lo

Page 42 - U7242A USB 3.0 Fixture

PrecisionProbe and Cable (N2809A) Characterize and correct any input path to your oscilloscope input using only your oscilloscope

Page 43 - April 13, 2011

The Problem: Measurement Repeatability Issues that make the problem worse1. Cables and channels are lossy2. Probe characteristics are different from p

Page 44 - What is Thunderbolt?

The Solution: PrecisionProbePrecisionProbe Quickly and Easily: - Characterizes and corrects the frequency response (Vout/Vin) of phase of any probe an

Page 45 - CAL output (step)

SuperSpeed USB 3.0 Key Messages SuperSpeed USB is in the broad adoption phase! Over 230 Certified SuperSpeed USB 3.0 Products 10 host Silicon, 8 IP

Page 46 - Analyze the data

Probes: Key TermsVinThe signal at the probe point before the probe is connected or the signal at the probe point if an ideal probe were connected Vsrc

Page 47

Cables: The resultResponse of cable with no correctionCorrected cable responseApplied corrected filter

Page 48 - Margins are being

The real time eyeResults: More margins!20% less jitter33% more eye heightSlightly wider eye

Page 49 - The Solution: PrecisionProbe

Summary: PrecisionProbe helps with the following:1. Cables and channels are lossy2. Probe characteristics are different from probe to probe3. Switch p

Page 50 - Probes: Key Terms

SummaryUSB 3.0 is now in broad adoption phaseTools for full TX/RX and channel characterization ready nowInfiniiSim “compliance channel” emulation w

Page 51 - Cables: The result

Additional references and links• Agilent Digital Test Solutions: http://agilent.eetimes.com/index.html• USB Implementers Forum, Inc. http://www.usb.or

Page 52 - The real time eye

Additional InformationGo to www.usb.org to get additional information on certifying your USB productsFor specific updates to compliance requirements g

Page 53

Worldwide shipment of USB-enabled DevicesPage 6 USB install base is 10+ billion and growing at 3+ billion a year.

Page 54

USB 3.0 Physical Layer Test Challenges•USB 2.0 High-Speed 480Mbps NRZI, Half Duplex 4 signals Dp, Dm, VCC, GND Cable Lmax= 5meter IconfigLP/FP= 1

Page 55

0.9 Draft, USB 3.0 PHY Electrical Test SpecificationKey Updates RX compliance calibration and testing performed at end of the channel Channel defin

Page 56 - Additional Information

USB 3.0 Compliance Test MatrixUSBIF source at http://www.usb.org/developers/ssusb/ssusb_pil/USB_3_0_Test_Matrix.pdfPage 9

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