Agilent Technologies E6701A Guide de l'utilisateur Page 213

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Agilent PXT Wireless Communications Test Set
User’s Guide
203
Power vs. Time (FDD/TDD)
Key Path:
Mode > SA > LTE > Power vs. Time
Figure 6-8: Power vs. Time measurement (FDD Example)
The Power vs. Time measurement can be used to verify that the UE is transmitting at the correct power
level on different subframes. For example, if the only allocation is in subframe 0 and 5, there should only
be signal power in the 0 ms to 1 ms interval and 5 to 6 ms of the Power Vs. Time trace. Make sure the
trigger delay is set appropriately (set to 0ms for most of the time) otherwise it will affect the position of
displayed graphical power measurement with respect to the frame boundaries. There are 12 measurement
gates available and the sweep time can be controlled and extended to 60 ms. Each measurement gate has
control of the gate delay, gate length, and gate delta in order to enable you to modify the measurement
period according to your requirements (for example, excluding transition periods on subframe boundaries).
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