Agilent Technologies 42A Spécifications télécharger pdf (Page 93)

Chapter 3: Testing Performance

To Test the Single-clock, Multiple-edge, State Acquisition

Check the setup/hold with single clock, multiple clock

edges

1 Select the logic analyzer setup/hold time.

a In the Analyzer setup window select the Sampling tab.

b Under the Sampling tab, select and activate a rising and falling edge for

any clock.

The Setup/Hold window requires a double clock edge before it will allow a setup/hold

of 5.0/-2.0 ns.

c Select the Format tab. Under the Format tab, select Setup/Hold.

d In the Setup and Hold window, ensure All bits is selected.

e Enter the setup time of the setup/hold combination to be tested in the

Setup: field.

Setup/Hold Combinations

QV

QV

f Select the close (X) button in the upper-right corner to close the Setup/

Hold window.

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Agilent Technologies 42A Spécifications Page 93