Agilent Technologies DisplayPort Manuel d'utilisateur télécharger pdf (Page 27)

Agilent Technologies, Inc.

DisplayPort Test Implementation Group 27 Agilent J-BERT N4903B & 90000A/X/Q Series Sink Draft2

10 Testing the DUT

1. At each Frequency

a. Test for Frequency Lock using D10.2 pattern for each data rate.

b. Test for Symbol Lock using Symbol Lock pattern at each data rate and each frequency.

c. Inject Errors and confirm correct amount of errors is being detected.

d. Test the Sink at each data rate and duration as described in Table 4-1 of the PHY CTS 1.2b.

Data Rate

Jitter

Frequency

Number

of Bits

Max Number of

Bit Errors

Allowable

Observation

Time

(seconds)

Data Rate

Offset

HBR2

HBR

RBR

2 MHz

1000

HBR2=185s

HBR=370s

RBR=620s

HBR2

HBR

RBR

10 MHz

100

HBR2=19s

HBR=37s

RBR=62s

+350ppm

HBR2

HBR

RBR

20 MHz

100

HBR2=19s

HBR=37s

RBR=62s

HBR2

HBR

100 MHz

100

HBR2=19s

HBR=37s

To evaluate multiply number of bits by the unit interval in ps. (i.e. for HBR: 10

bits at HBR =

370ps/UI * 10

UI = 37 seconds

Figure 26: Sink Test Times

1 2 ... 22 23 24 25 26 27 28 29 30 31 32 ... 55 56

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Agilent Technologies DisplayPort Manuel d'utilisateur Page 27

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